VC4ASM - History of changes
- The -c command line option now generates entirely
different C output intended to be used with a header file.
- The option to generate C hex output with a trailing ',' at
the last line (formerly -c) has gone.
- The -i option of V0.2.3 now only applies to the file
immediately after the -i option rather than the entire command
- The -E option has gone. Use -s -e instead.
- The vc4.qinc file now resides in the directory share/vc4inc/
rather than just share/. No big deal if you used the -i
option. Otherwise you need to adjust your command line, preferably by
- The entire message handling has been rewritten. This causes
incompatibilities in the library API as well as different screen output.
The library version can avoid to print to stderr.
- Switched build environment to CMake.
- Added full C compatible output using -c
including header file with global symbols (rather than only hex
- Test cases for disassembler.
- Try harder when combining small immediate values with vector rotation.
- bkpt instruction fixed.
- Do not override mux fields at read.
- Accept instruction extensions at nop and read.
- vc4dis: disassemble invalid instructions as raw data (.long).
- vc4dis: fixed disassembly of regfile A source in case of modulo 4 MUL
ALU vector rotation.
- vc4dis: generate .setf extension at branch also.
- vc4dis: disassembly of branch instruction with two destination
registers and only a regfile A target.
- Added language description file for GtkSourceView based editors like
gedit or pluma.
- Support of ::label syntax to define global (exported)
- Added building as library (shared and static) [doe300].
- CLI option -i to assemble files from include path. (Allows
to refer to vc4.qinc without path.)
- Added amov/mmov to explicitly place move
instruction to one of the ALUs (if vc4asm can't guess correctly).
- Make parser smarter with respect to operators that are not separated
- Do not unnecessarily swap ALUs when loading mov constants
with small immediate values.
- vc4.qinc: compatibility to Broadcom VPM macros.
- Complete redesign of pack/unpack handling. Support for packed register
expressions, including in macros.
- Support for instructions that are tied to an ALU, e.g. mv8adds.
- Support nop instruction with target register (to use easter
- Validator: warn about concurrent VPM access.
- Added binary rotate operators to expression syntax.
- Fixed instruction swap of sub & xor resulting
in bad code.
- Reworked Inf/NaN handling; fixes mov ...,
- Fixed parsing of floating point constants without a decimal
dot, e.g. 1E6.
- Disabled ELF support on OS X.
- Support to swap regfile A and regfile B read access if the I/O
register is invariant of that.
- Added support for mov and ldi with two target
- Added read pseudo instruction.
- Added support for code and data segments. (Validator does no longer
complain about data.)
- Added support for half precision floating point constants.
- Fixed use of regfile A pack modes with MUL ALU.
- Fixed disassemble signed values at ldipes.
- Fixed .align with more than 8 bytes, support offset based .align.
- Fixed local labels in .rep.
- Fixed ws swap in case of vector rotation. (e.g mov r3,
r0<<8; mov ra0, 0)
- Fixed disassemble of pack flags.
- Changed internal expression evaluation to 64 bit or double precision
- Support for alphanumeric mathematical operators like trigonometric,
hyperbolic or exponential function.
- Support for data directives without 64 bit alignment and .align.
- Added identity (===, !==), Perl like full
comparison (<=>) and xnor (!^, !^^)
- No longer accept floats as boolean expression, use explicit
comparison against 0.0 instead.
- Fixed: cannot define global constants in another file invoked from
- Validator: check for disjunctive conditional access before warning
about back to back register access.
- Automatically choose MUL ALU if mov instruction contains
- Warn about unexpected side effects in conjunction with MUL ALU vector
- Fixed .foreach
- Added support for direct ELF output.
- Added .global directive to export symbols in ELF format.
- Added support for C like include search paths.
- Added .local/.endloc.
- Do not accept blanks between : and label name to disambiguate branch
target markers before instruction names.
- Disassembler: fixed wrong code for branch with two write registers
and no regfile A read.
- Do not accept .if blocks to cross file boundaries.
- Fixed mov ..., -1.0
- Allow to combine two ldi with the same value to assign two
- Added support for the use of vector rotation values as small
- Fixed: disassemble rotation by r5.
- Fixed constant -2 at load per element signed.
- Fixed regfile A target check at mov constants created from
small immediate value with regfile A pack mode.
- Fixed destination operand extensions at mov instruction.
- .setf support at branch instruction.
- Fixed vc4dis: decoded not only the first 8 instructions in case of a
binary source file.
- Work around for missing git feature to create empty folders.
- Added support for use of pack modes when tying to load a constant by
the small immediate field.
- Fixed bug in small immediate table that caused some values not to
- Fixed duplicate messages for the invocation call stack at some parser
- Significantly improved source code documentation.
- Fixed unary ADD operators to use mux A rather than B.
- Fixed memory leak on platforms where va_end is not a no-op.
- Fixed disassemble of floating point numbers to be turn around stable.
- Fixed "The unpack option works for none of the source operands" error
when regfile A unpack is used as first operand of ALU instruction.
- Fixed "The unpack option silently applies to source argument" error
when using instruction level unpack syntax.
- Fixed MacOS issues. Thanks to Francisco Facioni.
- Fixed branch instructions broken by 0.1.5.
- Fixed 64 bit compatibility for cross platform operation.
- Merge with hello_fft 3.0, 4 Mi FFT, should fix RPi 2 compatibility.
- Use overlapping buffers for hello_fft, saves much memory.
- Support for MUL ALU pack and r4 unpack modes.
- Support for .ifset directive.
- Support for ALU swap when combining instructions. Can e.g. handle mov
ra16, r1; mov r1, 0x180 (The constant 0x180 can only be loaded by
the ADD ALU.)
- Fix: use of instruction extensions like .8a at ALU source
- Fix: do not auto combine TMU instructions.
- Fix: do not erroneously convert signalling instructions to ldi.
- Fix: honor .if/.macro at .int/.long...
- Added .foreach directive.
- Support all shift values with small immediates.
- Fixed .setf for MUL ALU.
- Fixed operator >>> and <<<.
- Support forward .clone.
- Fixed validation of branch return targets.
- Check for conditional TMU access.
- Do not overwrite read address B with small immediate value.
- Support equivalence of add ... 16 and sub
... -16 in conjunction with small immediates.
- Fixed pack/unpack instruction, still incomplete.
- Added .clone directive (experimental).
- Further optimizations to hello_fft example.
- Several smaller bugfixes.
- Added type detection macros.
- Optional automatic instruction packing.
- Merged with gpu_fft V2.0 including 2 Mi FFT, a few further
- Added support for binary constants between the code.